Bug known to me to exist in AN-619:

    p.2, 3.1.2: "register bits 15 [7:6]" -> "register 15, bits [7:6]"
    Just for readability.
    p.3, 3.2: "a + b/c such that c = 106" -> "a + b/c such that c = 10^6"
    This one repeats several times both in AN-619 and datasheet. Critical error.
    p.3, 3.3: "Set PLLA_CL = 2"
    p.3, 3.3: "Set PLLB_CL = 2"
    Well, this is a mystery to me. This parameter appears only here, does not have any connection with anything in datasheet or AN-619. Not in register map. Is it connected with reg183, bits [4:3] and bits [1:0]? This is just my guesswork, since these bits are unexplained and somewhat look similar. Either delete chapter 3.3 or put here explanation of this parameter. And of reg183, bits [5:0]. Not major problem, but should be rectified.
    QUESTION: WHAT THE HELL IS IT?
    p.6, 4.2.1: "Additionally, MS0 ... may be output ..."
    This is the place where you ought to explain the MS_FANOUT_EN bit of reg187. It is not explained anywhere, just stated to be set to 1. You should state something like "by setting MS_FANOUT_EN to 0, you cannot use this option, but power draw drops slightly". I'm just guessing with the power, but add the info about the usage of that bit. Rather major missing info.
    p.7, 4.2.2: "... logic low, logic high, or high-impedance ..."
    The "never disabled" option is not mentioned. Minor problem, just recommendation.
    p.8, 5: " include –0.1% to –2.5% down spread and up to ± 1.5% center spread"
    Are these the minimal guaranteed ranges or really limiting values? I managed to obtain about 3 times larger spread with no glitches (at high spreads such as 8%, glitches appear). Are the limits frequency/divider dependent? Minor problem.
    p.8, 5: "fPFD(A)"
    Missing unit of the frequency (Hz? MHz?). Later part of that sentence indicates MHz, but the equations work for Hz. Rather major problem.
    p.8, 5: "PLLA Multisynth radio" -> "PLLA Multisynth ratio"
    My OCD hurts. Not critical.
    p.11, 8.1: reg0 has unexplained bits REVID. Later explanation shows them as reserved. Not critical.
    p.11, 8.1: reg28 has reserved bits. Later it is revealed that bits [7:4] are not reserved, but unused. Synchronise, not critical.
    p.11, 8.1, p.31: reg36 has reserved bits, some of which are later revealed [7:4] to be unused rather than reserved. Synchronise. On p.31, they are marked as both unused and reserved, which is in conflict.
    The table on p.11 shows bits [7:6] to contain MSNB_P2[17:16] when in fact the register has MSNB_P1[17:16] on bits [1:0]. Critical error.
    p.11, 8.1: reg44 has bit [7] marked as reserved, later marked as unused. Synchronise, not critical.
    p.56: reg161 has unexplained bits SS_NCLK[3:0]. Do these set the spread rate? Missing info.
    p.60: reg183 has unexplained bits [5:0]. Are these the mysterious PLLx_CL parameters?
    p.61: reg187 has bits which are very shallowly explained but not explained when to use them. Minor problem, can be sorted out by non-retarded engineer, but needs some head scratching.

General major problem: It is not explained when to use PLL reset. Some info given by G0UPL here: https://groups.io/g/BITX20/topic/si5351a_facts_and_myths/5430607

Articles KB311668 and KB311538 contain the same document, but the document links to the KB311538.

Bugs known to exist in datasheet:

    Output impedance seems to be defined only for the 8mA drive and varies between versions of the datasheet.
    p.6: output phase step seems to be valid only for some 700 MHz on VCO, but not specified.
    p.8: I2C bus timeout is not mentioned anywhere else. Is it always on? When does it kick in?
    p.13, 3.1.1: The load capacitance is selectable between 0/6/8/10 pF. But in AN-619 the 0pF value is marked as forbidden. In AN-551 it is omitted completely.
    p.16: It is not specified what is thedefault A0 value for devices without that pin.
    p.18: There is some mumbo-jumbo about OTP ROM, but no info about how to program it or if it only contains "safe values". Discussion of users reveals that one can get factory preprogrammed devices with custom setting. But no hint about that in datasheet. The same goes for AN-619.
    p.19: Why should the CLKx_DIS be set to HIGH? It makes no actual sense. Safest setting should be HIGH Z.

That should be all of the errors known to me. Or at least the ones I remembered.
0
jmg

Level 7

Replied Mar 02 2018, 5:46 AM

    6.  p.18: There is some mumbo-jumbo about OTP ROM, but no info about how to program it or if it only contains "safe values". Discussion of users reveals that one can get factory preprogrammed devices with custom setting. But no hint about that in datasheet. The same goes for AN-619.

Yes, if you get a listed part code, such as SI5351A-B04486-GT, and paste that into the somewhat hidden part lookup

https://www.silabs.com/products/timing/lookup-customize

you find that part's OTP memory, power-up configs to :  MHz CLK0 : 49.1520 PLLA  CLK1 : 24.000 PLLB  CLK2 : 45.1584 PLLB   I2C address: 0x62

OTP seems to also (re)define the i2c address, so a little care is needed there too. Explains reports of differing address values in the field...