;Boiler plate code for AT90S2313 .device AT90S2313 ;***** I/O Register Definitions .equ SREG =$3f ;STATUS register .equ SPH =$3e .equ SPL =$3d ;Stack Pointer Low .equ GIMSK =$3b ;General Interrupt Mask Register .equ GIFR =$3a ;General Interrup Flag Register .equ TIMSK =$39 ;Timer/Counter Interrupt Mask Register .equ TIFR =$38 ;Timer/Counter Interrupt Flag Register .equ MCUCR =$35 ;MCU General Control Register .equ TCCR0 =$33 ;Timer/Counter 0 Control Register .equ TCNT0 =$32 ;Timer/Counter 0 .equ TCCR1A =$2f ;Timer/Counter 1 Control Register A .equ TCCR1B =$2e ;Timer/Counter 1 Control Register B .equ TCNT1H =$2d ;Timer/Counter 1 High Byte .equ TCNT1L =$2c ;Timer/Counter 1 Low Byte .equ OCR1AH =$2b ;Output Compare Register 1 High Byte .equ OCR1AL =$2a ;Output Compare Register 1 Low Byte .equ ICR1H =$25 ;T/C 1 Input Capture Register High Byte .equ ICR1L =$24 ;T/C 1 Input Capture Register Low Byte .equ WDTCR =$21 ;Watchdog Timer Control Register .equ EEAR =$1e ;EEPROM Address Register .equ EEARL =$1e .equ EEDR =$1d ;EEPROM Data Register .equ EECR =$1c ;EEPROM Control Register .equ PORTB =$18 ;Data Register, Port B .equ DDRB =$17 ;Data Direction Register, Port B .equ PINB =$16 ;Input Pins, Port B .equ PORTD =$12 ;Data Register, Port D .equ DDRD =$11 ;Data Direction Register, Port D .equ PIND =$10 ;Input Pins, Port D .equ UDR =$0c ;UART I/O Data Register .equ USR =$0b ;UART Status Register .equ UCR =$0a ;UART Control Register .equ UBRR =$09 ;UART Baud Rate Register .equ ACSR =$08 ;Analog Comparator Control and Status Register ;***** Bit Definitions ; SP Stack Pointer Register Bits .equ SP7 =7 .equ SP6 =6 .equ SP5 =5 .equ SP4 =4 .equ SP3 =3 .equ SP2 =2 .equ SP1 =1 .equ SP0 =0 ; GIMSK General Interrupt Mask Register Bits .equ INT1 =7 .equ INT0 =6 ; GIFR General Interrupt Flag Register Bits .equ INTF1 =7 .equ INTF0 =6 ; TIMSK Timer/Counter Interrupt Mask Register Bits .equ TOIE1 =7 .equ OCIE1A =6 .equ TICIE =3 .equ TOIE0 =1 ; TIFR Timer/Counter Interrupt Flag Register Bits .equ TOV1 =7 .equ OCF1A =6 .equ ICF1 =3 .equ TOV0 =1 ; MCUCR MCU Control Register Bits .equ SE =5 .equ SM =4 .equ ISC11 =3 .equ ISC10 =2 .equ ISC01 =1 .equ ISC00 =0 ; TCCR0 Timer/Counter0 Control Register Bits .equ CS02 =2 .equ CS01 =1 .equ CS00 =0 ; TCCR1A Timer/Counter1 Control Register A Bits .equ COM1A1 =7 .equ COM1A0 =6 .equ PWM11 =1 .equ PWM10 =0 ; TCCR1B Timer/Counter1 Control Register B Bits .equ ICNC1 =7 .equ ICES1 =6 .equ CTC1 =3 .equ CS12 =2 .equ CS11 =1 .equ CS10 =0 ; WDTCR Watchdog Timer Control Register Bits .equ WDTOE =4 .equ WDE =3 .equ WDP2 =2 .equ WDP1 =1 .equ WDP0 =0 ; EECR EEPROM Control Register .equ EEMWE =2 .equ EEWE =1 .equ EERE =0 ; Port B output bits .equ PB7 =7 .equ PB6 =6 .equ PB5 =5 .equ PB4 =4 .equ PB3 =3 .equ PB2 =2 .equ PB1 =1 .equ PB0 =0 ; Port B Direction Register Bits .equ DDB7 =7 .equ DDB6 =6 .equ DDB5 =5 .equ DDB4 =4 .equ DDB3 =3 .equ DDB2 =2 .equ DDB1 =1 .equ DDB0 =0 ; Port B Input Pins .equ PINB7 =7 .equ PINB6 =6 .equ PINB5 =5 .equ PINB4 =4 .equ PINB3 =3 .equ PINB2 =2 .equ PINB1 =1 .equ PINB0 =0 ; Port D output bits .equ PD6 =6 .equ PD5 =5 .equ PD4 =4 .equ PD3 =3 .equ PD2 =2 .equ PD1 =1 .equ PD0 =0 ; Port D Direction Register Bits .equ DDD6 =6 .equ DDD5 =5 .equ DDD4 =4 .equ DDD3 =3 .equ DDD2 =2 .equ DDD1 =1 .equ DDD0 =0 ; Port D Input Pins .equ PIND6 =6 .equ PIND5 =5 .equ PIND4 =4 .equ PIND3 =3 .equ PIND2 =2 .equ PIND1 =1 .equ PIND0 =0 ; USR UART Status Register Bits .equ RXC =7 .equ TXC =6 .equ UDRE =5 .equ FE =4 .equ OR =3 ; UCR UART Control Register Bits .equ RXCIE =7 .equ TXCIE =6 .equ UDRIE =5 .equ RXEN =4 .equ TXEN =3 .equ CHR9 =2 .equ RXB8 =1 .equ TXB8 =0 ; ACSR Analog Comparator Control and Status Register Bits .equ ACD =7 .equ ACO =5 .equ ACI =4 .equ ACIE =3 .equ ACIC =2 .equ ACIS1 =1 .equ ACIS0 =0 .equ RAMEND =$DF ;Last On-Chip SRAM Location .equ XRAMEND =$DF .equ E2END =$7F .equ FLASHEND=$3FF ;1k by 16 bits .equ INT0addr=$001 ;External Interrupt0 Vector Address .equ INT1addr=$002 ;External Interrupt1 Vector Address .equ ICP1addr=$003 ;Input Capture1 Interrupt Vector Address .equ OC1addr =$004 ;Output Compare1 Interrupt Vector Address .equ OVF1addr=$005 ;Overflow1 Interrupt Vector Address .equ OVF0addr=$006 ;Overflow0 Interrupt Vector Address .equ URXCaddr=$007 ;UART Receive Complete Interrupt Vector Address .equ UDREaddr=$008 ;UART Data Register Empty Interrupt Vector Address .equ UTXCaddr=$009 ;UART Transmit Complete Interrupt Vector Address .equ ACIaddr =$00a ;Analog Comparator Interrupt Vector Address ;Define register name ; r0 is used by Z-registor .def temp1 =r16 .def temp2 =r17 .def temp3 =r18 .def temp4 =r19 .def temp5 =r20 .def temp6 =r21 .def XL =r26 .def XH =r27 .def YL =r28 .def YH =r29 .def ZL =r30 .def ZH =r31 .cseg ;This tells the assembler that what follows is code, and goes in ROMspace .org $000 rjmp RESET rjmp EXT_INT0 ; IRQ0 rjmp EXT_INT1 ; IRQ1 rjmp TIM1_CAPT ; Timer1 Capture rjmp TIM1_COMP ; Timer1 Compare rjmp TIM1_OVF ; Timer1 Overflow rjmp TIM0_OVF ; Timer0 Overflow rjmp UART_RXC ; UART Receive rjmp UART_DRE ; UART empty rjmp UART_TXC ; UART Transmit rjmp ANA_COMP ; Analog comparator RESET: ;init everything here ldi temp1,low(RAMEND) out SPL,temp1 ; Set stack pointer to last internal RAM location ldi temp1,high(RAMEND) out SPH,temp1 menu: ;main program ;your code goes here rjmp menu EXT_INT0: push temp1 ;save temp1 register in temp1,SREG ;save the status register out SREG,temp1 ;restore the status register pop temp1 ;restore temp1 register reti EXT_INT1: push temp1 in temp1,SREG out SREG,temp1 pop temp1 reti TIM1_CAPT: push temp1 in temp1,SREG out SREG,temp1 pop temp1 reti TIM1_COMP: push temp1 in temp1,SREG out SREG,temp1 pop temp1 reti TIM1_OVF: push temp1 in temp1,SREG out SREG,temp1 pop temp1 reti TIM0_OVF: push temp1 in temp1,SREG out SREG,temp1 pop temp1 reti UART_RXC: push temp1 in temp1,SREG out SREG,temp1 pop temp1 reti UART_DRE: push temp1 in temp1,SREG out SREG,temp1 pop temp1 reti UART_TXC: push temp1 in temp1,SREG out SREG,temp1 pop temp1 reti ANA_COMP: push temp1 in temp1,SREG out SREG,temp1 pop temp1 reti